BGA Modeling of memory bus

SiP of Memory controller with 8-SDRAM dies

In the GHz Age of High-Speed-Digital, it is critical to accurately model different components of the system. Examples below show 3D-EM modeling of Antennas, BGAs of CPUs/GPUs/Chipsets, PCBs ranging from Memory-/ GPU-cards & Motherboards. Modeling of systems such as SiP (system in Package) , Smartphones/Tablets/Servers & Ethernet Backplanes is a MUST for successful operation of your products.

Our Expertise Find the MUST-Have Enablers to meet Cost, Performance and Power-Budget of your system. 

3D Electromagnetic Design & Modeling of High-Speed-Digital  Systems

Cost Reduction of SiP with Two-layers is very challenging to run high-data rates. x-talk and Return-Path-Discontinuity is of great impact on eye-opening. Our Expertise found the MUST-HAVE enablers to operate the SiP at Maximum Data-rate of 200MHz MCH talking with 8-dies.

Experts in trade-off between cost, performance and power-consumption for PKGs and PCBs. We found the right spot to run DDR3-1333 while reducing cost on BGA PKG for MCH meeting eye-mask requirements, minimum P2P noise on VddQ pins and controlling Radiated-Emission ALL-AT-ONCE.

 

Expertise & Tools (Simulations &  H/w measurements) allows us to be the eye-doctors of your PCBs and PKGs to meet the eye-mask, control P2P noise propagation and jitter along with defining enablers to meet EMC Compliance ALL-AT-ONCE. 

Cost-Reduction on PCBs with Four-Layers is challenging to route a GPU-card HSD interfaces. We are able to meet both eye-mask as well as control the radiated emission for all high-speed-digital interfaces. 

GPU-card Modeling memory interface

DDR3 SODIMM Memory Module

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